Synopsys Design Implementation Tools Receive TSMC 20nm Phase I Certification

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This past summer I was fortunate to work for Grace Semiconductor, a leading 8-inch semiconductor fab in Mainland China, as Application Strategy Manager Support under the Marketing Department. I cooperate with Circuit Design, Layout, and Testing group to update relevant IP database and ensure consistency. A Semiconductor IP (Intellectual Property) is a reusable unit of logic, cell or chip layout design that is the intellectual property of one party. IP cores may be licensed to another party or also be owned and used by a single party alone (Wikipedia). In this assignment, I looked for news articles relating to the development of IP digital library system which enhances the interactions of information organization and retrieval (IO/IR).

(May 31, 2012 Press Release) Synopsys, Inc. a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, announced that its 20-nm process implementation tools were given Phase I Certification from TSMC, the number one semiconductor foundry is the world. To facilitate the complex process of IP development, the Synopsys certified products include IC compiler for physical design, IC validator for DRC and LVS, as well as tools for extraction and custom implementation.

As Suk Lee, senior director of Design Infrastructure Marketing at TSMC said, the acquirement of Synopsys IP implementation tools helps ensure TSMC design teams have the technologies and efficient support needed to address new challenges. If we think about organizing system in a more abstract way, the new Synopsys certified IP system can be regarded as a synthesis of IO and IR system which selects, describes, organizes and maintains resources (from Lecture 1).